Line data Source code
1 : #ifndef CFO_AND_DTC_DMAS_H
2 : #define CFO_AND_DTC_DMAS_H
3 :
4 : #include <list>
5 : #include <memory>
6 : #include <vector>
7 :
8 : // #include "artdaq-core-mu2e/Overlays/DTC_Packets.h"
9 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DCSReplyPacket.h"
10 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DCSRequestPacket.h"
11 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DMAPacket.h"
12 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DataBlock.h"
13 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DataHeaderPacket.h"
14 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DataPacket.h"
15 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DataRequestPacket.h"
16 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_DataStatus.h"
17 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_Event.h"
18 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_EventHeader.h"
19 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_HeartbeatPacket.h"
20 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_PacketType.h"
21 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_SubEvent.h"
22 : #include "artdaq-core-mu2e/Overlays/DTC_Packets/DTC_SubEventHeader.h"
23 :
24 : #include "DTC_Registers.h"
25 :
26 : // #include "artdaq-core-mu2e/Overlays/DTC_Types.h"
27 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_CharacterNotInTableError.h"
28 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_DCSOperationType.h"
29 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_DDRFlags.h"
30 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_DebugType.h"
31 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_EVBStatus.h"
32 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_EventMode.h"
33 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_EventWindowTag.h"
34 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_FIFOFullErrorFlags.h"
35 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_IICDDRBusAddress.h"
36 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_IICSERDESBusAddress.h"
37 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_LinkEnableMode.h"
38 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_LinkStatus.h"
39 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_Link_ID.h"
40 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_OscillatorType.h"
41 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_PLL_ID.h"
42 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_PRBSMode.h"
43 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_ROC_Emulation_Type.h"
44 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_RXBufferStatus.h"
45 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_RXStatus.h"
46 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_SERDESLoopbackMode.h"
47 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_SERDESRXDisparityError.h"
48 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_SerdesClockSpeed.h"
49 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_SimMode.h"
50 : #include "artdaq-core-mu2e/Overlays/DTC_Types/DTC_Subsystem.h"
51 : #include "artdaq-core-mu2e/Overlays/DTC_Types/Exceptions.h"
52 : #include "artdaq-core-mu2e/Overlays/DTC_Types/Utilities.h"
53 :
54 : namespace DTCLib
55 : {
56 :
57 : /// <summary>
58 : /// This class implements common DMA functionality for the CFO and DTC
59 : /// </summary>
60 : class CFOandDTC_DMAs
61 : {
62 : public:
63 : /// <summary>
64 :
65 : /// <summary>
66 : /// Release all buffers to the hardware on the given channel
67 : /// </summary>
68 : /// <param name="channel">Channel to release</param>
69 : // void ReleaseAllBuffers(const DTC_DMA_Engine& channel);
70 :
71 : // int ReadBuffer(const DTC_DMA_Engine& channel, int retries = 10);
72 : // /// <summary>
73 : // /// This function releases all buffers except for the one containing currentReadPtr. Should only be called when done
74 : // /// with data in other buffers!
75 : // /// </summary>
76 : // /// <param name="channel">Channel to release</param>
77 : // void ReleaseBuffers(const DTC_DMA_Engine& channel);
78 : // void WriteDataPacket(const DTC_DataPacket& packet);
79 :
80 : struct DMAInfo
81 : {
82 : std::deque<mu2e_databuff_t*> buffer;
83 : uint32_t bufferIndex;
84 : void* currentReadPtr;
85 : void* lastReadPtr;
86 0 : DMAInfo()
87 0 : : buffer()
88 0 : , bufferIndex(0)
89 0 : , currentReadPtr(nullptr)
90 0 : , lastReadPtr(nullptr) {}
91 0 : ~DMAInfo()
92 : {
93 0 : buffer.clear();
94 0 : currentReadPtr = nullptr;
95 0 : lastReadPtr = nullptr;
96 0 : }
97 : };
98 : static int GetCurrentBuffer(DMAInfo* info);
99 : static uint16_t GetBufferByteCount(DMAInfo* info, size_t index);
100 : };
101 : } // namespace DTCLib
102 : #endif // end CFO_AND_DTC_DMAS_H
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