LCOV - code coverage report

Current view: top level - mu2e-pcie-utils/dtcInterfaceLib - CFOandDTC_Registers.cpp (source / functions) Coverage Total Hit Test: mu2edaq.info.cleaned Lines: 0.0 % 1691 0 Test Date: 2026-07-30 01:56:44 Functions: 0.0 % 140 0

Function Name	Hit count
_ZN6DTCLib19CFOandDTC_Registers11ResetSERDESEv	0
_ZN6DTCLib19CFOandDTC_Registers13ReadHardResetESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKt	0
_ZN6DTCLib19CFOandDTC_Registers13ReadSoftResetESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers14ReadDesignDateB5cxx11ESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers14ReadDesignTypeB5cxx11ESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers14ReadFPGAAlarmsESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers14ResetRXFireflyEv	0
_ZN6DTCLib19CFOandDTC_Registers14ResetTXFireflyEv	0
_ZN6DTCLib19CFOandDTC_Registers14SetPunchEnableEv	0
_ZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKt	0
_ZN6DTCLib19CFOandDTC_Registers15ReadPunchEnableESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers15ReadResetSERDESESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers15ReadVCCAUXAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers15ReadVCCINTAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers15ResetFPGAAlarmsESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers16ClearPunchEnableEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatDesignDateEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatDeviceHashEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatFPGAAlarmsEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatFPGAVCCAUXEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatFPGAVCCINTEv	0
_ZN6DTCLib19CFOandDTC_Registers16FormatFireflyCSREv	0
_ZN6DTCLib19CFOandDTC_Registers16FormattedRegDumpB5cxx11EiRKSt6vectorISt8functionIFNS_17RegisterFormatterEvEESaIS5_EE	0
_ZN6DTCLib19CFOandDTC_Registers16ReadVCCBRAMAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers16ResetTXRXFireflyEv	0
_ZN6DTCLib19CFOandDTC_Registers16ResetVCCAUXAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers16ResetVCCINTAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers17FormatFPGAVCCBRAMEv	0
_ZN6DTCLib19CFOandDTC_Registers17ReadDesignVersionB5cxx11Ev	0
_ZN6DTCLib19CFOandDTC_Registers17ResetVCCBRAMAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers18ReadResetRXFireflyESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers18ReadResetTXFireflyESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers18SetRXFireflySelectEb	0
_ZN6DTCLib19CFOandDTC_Registers18SetTXFireflySelectEb	0
_ZN6DTCLib19CFOandDTC_Registers18isCFODesignFlavourESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers19FormatDesignVersionEv	0
_ZN6DTCLib19CFOandDTC_Registers19FormatVivadoVersionEv	0
_ZN6DTCLib19CFOandDTC_Registers19ReadDesignLinkSpeedB5cxx11ESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers19ReadFPGATemperatureESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers19ReadRXFireflySelectESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers19ReadTXFireflySelectESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers20ClearControlRegisterEv	0
_ZN6DTCLib19CFOandDTC_Registers20ReadRXFireflyPresentESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers20ReadResetTXRXFireflyESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers20ReadTXFireflyPresentESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers20SetTXRXFireflySelectEb	0
_ZN6DTCLib19CFOandDTC_Registers21FormatDeviceTimeAliveEv	0
_ZN6DTCLib19CFOandDTC_Registers21FormatFPGATemperatureEv	0
_ZN6DTCLib19CFOandDTC_Registers21ReadFPGAVCCAUXVoltageESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers21ReadFPGAVCCINTVoltageESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers21ReadTXRXFireflySelectESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers21ResetJitterAttenuatorEtSt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers21isCRVDTCDesignFlavourESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers22ReadFPGAVCCBRAMVoltageESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers22ReadRXFireflyInterruptESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers22ReadSERDESIICInterfaceENS_23DTC_IICSERDESBusAddressEh	0
_ZN6DTCLib19CFOandDTC_Registers22ReadTXFireflyInterruptESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers22ReadTXRXFireflyPresentESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers23ReadDesignVersionNumberB5cxx11ESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers23ReadVivadoVersionNumberB5cxx11ESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers23WriteSERDESIICInterfaceENS_23DTC_IICSERDESBusAddressEhh	0
_ZN6DTCLib19CFOandDTC_Registers24ReadTXRXFireflyInterruptESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers24isNonCRVDTCDesignFlavourESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers25ConfigureJitterAttenuatorEv	0
_ZN6DTCLib19CFOandDTC_Registers25FormatFireflyRXIICControlEv	0
_ZN6DTCLib19CFOandDTC_Registers25FormatFireflyTXIICControlEv	0
_ZN6DTCLib19CFOandDTC_Registers25FormatJitterAttenuatorCSREt	0
_ZN6DTCLib19CFOandDTC_Registers25ReadFireflyRXIICInterfaceEhh	0
_ZN6DTCLib19CFOandDTC_Registers25ReadFireflyTXIICInterfaceEhh	0
_ZN6DTCLib19CFOandDTC_Registers25ReadJitterAttenuatorResetEtSt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers25RunCableDelayLoopbackTestEv	0
_ZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEb	0
_ZN6DTCLib19CFOandDTC_Registers26ReadJitterAttenuatorLockedEtSt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers26ReadJitterAttenuatorSelectEtSt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers26ResetFireflyRXIICInterfaceEv	0
_ZN6DTCLib19CFOandDTC_Registers26ResetFireflyTXIICInterfaceEv	0
_ZN6DTCLib19CFOandDTC_Registers26WriteFireflyRXIICInterfaceEhhh	0
_ZN6DTCLib19CFOandDTC_Registers26WriteFireflyTXIICInterfaceEhhh	0
_ZN6DTCLib19CFOandDTC_Registers27FormatFireflyTXRXIICControlEv	0
_ZN6DTCLib19CFOandDTC_Registers27ReadFPGADieTemperatureAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers27ReadFireflyTXRXIICInterfaceEhh	0
_ZN6DTCLib19CFOandDTC_Registers28ReadFPGAUserTemperatureAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers28ResetFPGADieTemperatureAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers28ResetFireflyTXRXIICInterfaceEv	0
_ZN6DTCLib19CFOandDTC_Registers28WriteFireflyTXRXIICInterfaceEhhh	0
_ZN6DTCLib19CFOandDTC_Registers29CFOandDTCVerifyRegisterWrite_ERKtjj	0
_ZN6DTCLib19CFOandDTC_Registers29ResetFPGAUserTemperatureAlarmESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers30FormatFireflyRXIICParameterLowEv	0
_ZN6DTCLib19CFOandDTC_Registers30FormatFireflyTXIICParameterLowEv	0
_ZN6DTCLib19CFOandDTC_Registers30ReadFireflyRXIICInterfaceResetESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers30ReadFireflyTXIICInterfaceResetESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers31FormatFireflyRXIICParameterHighEv	0
_ZN6DTCLib19CFOandDTC_Registers31FormatFireflyTXIICParameterHighEv	0
_ZN6DTCLib19CFOandDTC_Registers32FormatFireflyTXRXIICParameterLowEv	0
_ZN6DTCLib19CFOandDTC_Registers32ReadFireflyTXRXIICInterfaceResetESt8optionalIjE	0
_ZN6DTCLib19CFOandDTC_Registers33FormatFireflyTXRXIICParameterHighEv	0
_ZN6DTCLib19CFOandDTC_Registers34FormatSERDESOscillatorParameterLowEv	0
_ZN6DTCLib19CFOandDTC_Registers35FormatSERDESOscillatorParameterHighEv	0
_ZN6DTCLib19CFOandDTC_Registers7GetBit_ERKtm	0
_ZN6DTCLib19CFOandDTC_Registers7SetBit_ERKtmb	0
_ZN6DTCLib19CFOandDTC_Registers9HardResetEv	0
_ZN6DTCLib19CFOandDTC_Registers9SoftResetEv	0
_ZN6DTCLib19CFOandDTC_RegistersC2Ev	0
_ZN6DTCLib19CFOandDTC_RegistersD0Ev	0
_ZN6DTCLib19CFOandDTC_RegistersD0Ev	0
_ZN6DTCLib19CFOandDTC_RegistersD2Ev	0
_ZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE0_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE1_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE1_clEv	0
_ZZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE1_clEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE2_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers13ReadRegister_ERKtENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers14ReadDesignDateB5cxx11ESt8optionalIjEENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKtENKUlvE0_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKtENKUlvE0_clEv	0
_ZZZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKtENKUlvE0_clEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKtENKUlvE1_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers14WriteRegister_EjRKtENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers22ReadSERDESIICInterfaceENS_23DTC_IICSERDESBusAddressEhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers23ReadDesignVersionNumberB5cxx11ESt8optionalIjEENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers23WriteSERDESIICInterfaceENS_23DTC_IICSERDESBusAddressEhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25ReadFireflyRXIICInterfaceEhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25ReadFireflyTXIICInterfaceEhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEbENKUlvE0_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEbENKUlvE1_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEbENKUlvE2_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEbENKUlvE3_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers25SetJitterAttenuatorSelectEtSt6bitsetILm2EEbENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers26ResetFireflyRXIICInterfaceEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers26ResetFireflyTXIICInterfaceEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers26WriteFireflyRXIICInterfaceEhhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers26WriteFireflyTXIICInterfaceEhhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers27ReadFireflyTXRXIICInterfaceEhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers28ResetFireflyTXRXIICInterfaceEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers28WriteFireflyTXRXIICInterfaceEhhhENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers29CFOandDTCVerifyRegisterWrite_ERKtjjENKUlvE0_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers29CFOandDTCVerifyRegisterWrite_ERKtjjENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers7GetBit_ERKtmENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers7SetBit_ERKtmbENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers9HardResetEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_Registers9SoftResetEvENKUlvE_clEv	0
_ZZN6DTCLib19CFOandDTC_RegistersD4EvENKUlvE_clEv	0

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